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1f82b8bc3a
| Author | SHA1 | Date | |
|---|---|---|---|
| 1f82b8bc3a | |||
| d285967e81 |
@@ -64,6 +64,7 @@ static volatile bool m_flash_write_done;
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#define SCHED_QUEUE_SIZE 32 /**< Maximum number of events in the scheduler queue. */
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#define SCHED_EVENT_DATA_SIZE NRF_DFU_SCHED_EVENT_DATA_SIZE /**< Maximum app_scheduler event size. */
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#define POST_DFU_APP_BOOT_GPREGRET2_MASK 0x02U
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#if !(defined(NRF_BL_DFU_ENTER_METHOD_BUTTON) && \
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defined(NRF_BL_DFU_ENTER_METHOD_PINRESET) && \
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@@ -470,6 +471,7 @@ ret_code_t nrf_bootloader_init(nrf_dfu_observer_t observer)
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break;
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case ACTIVATION_SUCCESS:
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nrf_power_gpregret2_set(nrf_power_gpregret2_get() | POST_DFU_APP_BOOT_GPREGRET2_MASK);
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bootloader_reset(true);
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NRF_LOG_ERROR("Unreachable");
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return NRF_ERROR_INTERNAL; // Should not reach this.
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@@ -17,6 +17,7 @@
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#include "dr_piezo.h"
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#include "dr_adc121s051.h"
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#include "led_control.h"
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#include "../../measurement/piezo/piezo_config.h"
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static void mtb_send_rim_after_piezo(void)
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{
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@@ -64,48 +65,48 @@ static uint8_t clamp_piezo_freq_option(uint16_t raw_freq)
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static uint8_t clamp_piezo_cycles(uint16_t cycles)
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{
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if (cycles < 3)
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if (cycles < PIEZO_CONFIG_CYCLES_MIN)
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{
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return 3;
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return (uint8_t)PIEZO_CONFIG_CYCLES_MIN;
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}
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if (cycles > 7)
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if (cycles > PIEZO_CONFIG_CYCLES_MAX)
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{
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return 7;
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return (uint8_t)PIEZO_CONFIG_CYCLES_MAX;
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}
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return (uint8_t)cycles;
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}
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static uint16_t clamp_piezo_averaging(uint16_t averaging)
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{
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if (averaging < 1)
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if (averaging < PIEZO_CONFIG_AVERAGING_MIN)
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{
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return 1;
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return PIEZO_CONFIG_AVERAGING_MIN;
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}
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if (averaging > 10)
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if (averaging > PIEZO_CONFIG_AVERAGING_MAX)
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{
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return 10;
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return PIEZO_CONFIG_AVERAGING_MAX;
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}
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return averaging;
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}
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static uint16_t clamp_piezo_delay_us(uint16_t delay_us)
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{
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if (delay_us > 50)
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if (delay_us > PIEZO_CONFIG_DELAY_US_MAX)
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{
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return 50;
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return PIEZO_CONFIG_DELAY_US_MAX;
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}
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return delay_us;
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}
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static uint16_t clamp_piezo_num_samples(uint16_t num_samples)
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{
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if (num_samples < 80)
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if (num_samples < PIEZO_CONFIG_NUM_SAMPLES_MIN)
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{
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return 80;
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return PIEZO_CONFIG_NUM_SAMPLES_MIN;
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}
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if (num_samples > 119)
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if (num_samples > PIEZO_CONFIG_NUM_SAMPLES_MAX)
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{
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return 119;
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return PIEZO_CONFIG_NUM_SAMPLES_MAX;
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}
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return num_samples;
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}
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@@ -164,8 +165,8 @@ int Cmd_mpb(const ParsedCmd *cmd)
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*============================================================================*/
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int Cmd_mpc(const ParsedCmd *cmd)
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{
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uint16_t cycles = 5;
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uint16_t freq_option = 1;
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uint16_t cycles = DR_PIEZO_DEFAULT_CYCLES;
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uint16_t freq_option = PIEZO_CONFIG_FREQ_OPTION_DEFAULT;
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uint16_t piezo_ch = 0;
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(void)dr_get_u16(cmd, 0, &cycles);
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@@ -177,7 +178,7 @@ int Cmd_mpc(const ParsedCmd *cmd)
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piezo_ch = 0;
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}
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if (cycles < 3 || cycles > 7)
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if (cycles < PIEZO_CONFIG_CYCLES_MIN || cycles > PIEZO_CONFIG_CYCLES_MAX)
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{
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dr_ble_return_1("rpc:", 2);
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return 1;
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@@ -224,7 +225,7 @@ int Cmd_mec(const ParsedCmd *cmd)
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uint16_t freq_option = 0;
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uint16_t delay_us = 20;
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uint16_t num_samples = 140;
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uint16_t cycles = 5;
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uint16_t cycles = DR_PIEZO_DEFAULT_CYCLES;
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uint16_t averaging = 1;
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uint16_t piezo_ch = 0;
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@@ -40,6 +40,7 @@
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#include "nrf_pwr_mgmt.h"
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#include "main.h"
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#include "debug_print.h"
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#include "../../measurement/piezo/piezo_config.h"
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/* FDS record identifiers */
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@@ -107,11 +108,11 @@ void fds_default_value_set(void)
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m_config.life_cycle = 0;
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/* Piezo measurement parameter defaults */
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m_config.piezo_freq_option = 1; /* 2.1 MHz */
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m_config.piezo_delay_us = 10; /* 10 us after burst */
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m_config.piezo_num_samples = 100; /* 100 samples */
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m_config.piezo_cycles = 3; /* 7 cycles */
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m_config.piezo_averaging = 3; /* 3x averaging */
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m_config.piezo_freq_option = PIEZO_CONFIG_FREQ_OPTION_DEFAULT; /* 2.1 MHz */
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m_config.piezo_delay_us = PIEZO_CONFIG_DELAY_US_DEFAULT; /* 10 us after burst */
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m_config.piezo_num_samples = PIEZO_CONFIG_NUM_SAMPLES_DEFAULT; /* 100 samples */
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m_config.piezo_cycles = PIEZO_CONFIG_CYCLES_DEFAULT; /* 3 cycles */
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m_config.piezo_averaging = PIEZO_CONFIG_AVERAGING_DEFAULT; /* 3x averaging */
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/* Factory provisioning — default: not provisioned */
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m_config.factory_provisioned = 0;
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@@ -181,6 +181,7 @@
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#define POWER_OFF_DELAY 3000 /* Power-off delay: 3s after LED indication */
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#define POWER_RESET_DELAY 2000 /* Reset delay: 2s */
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#define LED_NUM 24 /* LED pin number */
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#define POST_DFU_APP_BOOT_GPREGRET2_MASK 0x02U /* Bootloader marker after DFU activation */
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/*==============================================================================
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* BLE Instances (statically allocated via SoftDevice macros)
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@@ -2182,6 +2183,17 @@ int main(void)
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*────────────────────────────────────────────────────────────*/
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power_hold_init();
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if ((NRF_POWER->GPREGRET2 & POST_DFU_APP_BOOT_GPREGRET2_MASK) != 0)
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{
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NRF_POWER->GPREGRET2 &= ~POST_DFU_APP_BOOT_GPREGRET2_MASK;
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NRF_P0->OUTCLR = (1UL << 8);
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NRF_P0->DIRSET = (1UL << 8);
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while (true)
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{
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__WFE();
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}
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}
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if (power_off_duble_prohibit)
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{
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return 0;
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@@ -30,6 +30,7 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf_gpio.h"
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#include "../piezo/piezo_config.h"
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/*==============================================================================
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* PIN CONFIGURATION
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@@ -73,8 +74,8 @@
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*============================================================================*/
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#define DR_ADC_SCLK_MHZ 8.6f /**< SPI bit-bang SCLK frequency */
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#define DR_ADC_CLOCKS_PER_SAMPLE 16 /**< ADC121S051: 16 SCLK per sample */
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#define DR_ADC_ECHO_SAMPLES_MAX 119 /**< Maximum samples */
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#define DR_ADC_ECHO_SAMPLES_DEFAULT 100 /**< Default samples */
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#define DR_ADC_ECHO_SAMPLES_MAX PIEZO_CONFIG_NUM_SAMPLES_MAX /**< Maximum samples */
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#define DR_ADC_ECHO_SAMPLES_DEFAULT PIEZO_CONFIG_NUM_SAMPLES_DEFAULT /**< Default samples */
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#define DR_ADC_SAMPLE_INTERVAL_US 1.86f /**< 16 / 8.6MHz = 1.86us per sample */
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#define DR_ADC_SOUND_SPEED_MM_US 1.54f /**< Sound speed in tissue (mm/us) */
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@@ -32,6 +32,7 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include "nrf_gpio.h"
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#include "piezo_config.h"
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/*==============================================================================
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* Power control pin (+/-20V DC/DC converter)
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@@ -64,9 +65,9 @@
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* Configuration
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*============================================================================*/
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#define DR_PIEZO_FREQ_HZ 2100000 /**< Target frequency (set PIEZO_FREQ_MHZ in .c) */
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#define DR_PIEZO_DEFAULT_CYCLES 5 /**< Default burst cycles */
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#define DR_PIEZO_MIN_CYCLES 3
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#define DR_PIEZO_MAX_CYCLES 7
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#define DR_PIEZO_DEFAULT_CYCLES PIEZO_CONFIG_CYCLES_DEFAULT /**< Default burst cycles */
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#define DR_PIEZO_MIN_CYCLES PIEZO_CONFIG_CYCLES_MIN
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#define DR_PIEZO_MAX_CYCLES PIEZO_CONFIG_CYCLES_MAX
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#define DR_PIEZO_MUX_SETTLING_US 1300 /**< MUX settling delay (us) */
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/*==============================================================================
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@@ -0,0 +1,29 @@
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/*==============================================================================
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* piezo_config.h - Shared piezo measurement parameter limits/defaults
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*============================================================================*/
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#ifndef PIEZO_CONFIG_H
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#define PIEZO_CONFIG_H
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/* Frequency option protocol:
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* 0=1.8MHz, 1=2.1MHz, 2=2.0MHz, 3=1.7MHz, 4=2.2MHz, 9=1.9MHz
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*/
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#define PIEZO_CONFIG_FREQ_OPTION_DEFAULT 1U
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#define PIEZO_CONFIG_CYCLES_MIN 3U
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#define PIEZO_CONFIG_CYCLES_MAX 7U
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#define PIEZO_CONFIG_CYCLES_DEFAULT 7U
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#define PIEZO_CONFIG_AVERAGING_MIN 1U
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#define PIEZO_CONFIG_AVERAGING_MAX 10U
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#define PIEZO_CONFIG_AVERAGING_DEFAULT 10U
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#define PIEZO_CONFIG_DELAY_US_MIN 0U
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#define PIEZO_CONFIG_DELAY_US_MAX 50U
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#define PIEZO_CONFIG_DELAY_US_DEFAULT 10U
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#define PIEZO_CONFIG_NUM_SAMPLES_MIN 80U
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#define PIEZO_CONFIG_NUM_SAMPLES_MAX 117U
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#define PIEZO_CONFIG_NUM_SAMPLES_DEFAULT 100U
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#endif /* PIEZO_CONFIG_H */
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+11
@@ -32,6 +32,8 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA.
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#include "system_nrf52_approtect.h"
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#define __SYSTEM_CLOCK_64M (64000000UL)
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#define POWER_HOLD_PIN 8UL
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#define POWER_HOLD_PIN_MASK (1UL << POWER_HOLD_PIN)
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#if defined ( __CC_ARM )
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@@ -89,6 +91,15 @@ void SystemCoreClockUpdate(void)
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void SystemInit(void)
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{
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/* Keep the external power latch asserted immediately after reset. */
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NRF_P0->OUTSET = POWER_HOLD_PIN_MASK;
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NRF_P0->DIRSET = POWER_HOLD_PIN_MASK;
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NRF_P0->PIN_CNF[POWER_HOLD_PIN] =
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(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
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(GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
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(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
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(GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
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(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
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/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
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Specification to see which one). */
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#if defined (ENABLE_SWO) && defined(CLOCK_TRACECONFIG_TRACEMUX_Pos)
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@@ -76,6 +76,8 @@ static void dfu_observer(nrf_dfu_evt_type_t evt_type)
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break;
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case NRF_DFU_EVT_DFU_STARTED:
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break;
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case NRF_DFU_EVT_DFU_COMPLETED:
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break;
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default:
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break;
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}
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+11
@@ -32,6 +32,8 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA.
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#include "system_nrf52_approtect.h"
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#define __SYSTEM_CLOCK_64M (64000000UL)
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#define POWER_HOLD_PIN 8UL
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#define POWER_HOLD_PIN_MASK (1UL << POWER_HOLD_PIN)
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#if defined ( __CC_ARM )
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@@ -89,6 +91,15 @@ void SystemCoreClockUpdate(void)
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void SystemInit(void)
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{
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/* Keep the external power latch asserted immediately after reset. */
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NRF_P0->OUTSET = POWER_HOLD_PIN_MASK;
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NRF_P0->DIRSET = POWER_HOLD_PIN_MASK;
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NRF_P0->PIN_CNF[POWER_HOLD_PIN] =
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(GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos) |
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(GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos) |
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(GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos) |
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(GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) |
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(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
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/* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
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Specification to see which one). */
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#if defined (ENABLE_SWO) && defined(CLOCK_TRACECONFIG_TRACEMUX_Pos)
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+1
-1
@@ -73,7 +73,7 @@
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<LExpSel>0</LExpSel>
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</OPTXL>
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<OPTFL>
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<tvExp>0</tvExp>
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<tvExp>1</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<IsCurrentTarget>1</IsCurrentTarget>
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</OPTFL>
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